bfd/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.

1 files changed, 45 insertions, 11 deletions

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index a54d633c519..9c94e78fdf9 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -43,7 +43,7 @@ typedef struct initializer
 static initializer cpu_flag_init[] =
 {
   { "CPU_UNKNOWN_FLAGS",
-    "unknown" },
+    "~CpuL1OM" },
   { "CPU_GENERIC32_FLAGS",
     "Cpu186|Cpu286|Cpu386" },
   { "CPU_GENERIC64_FLAGS", 
@@ -150,6 +150,8 @@ static initializer cpu_flag_init[] =
     "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
   { "CPU_ANY_AVX_FLAGS",
     "CpuAVX" },
+  { "CPU_L1OM_FLAGS",
+    "unknown" },
 };
 
 static initializer operand_type_init[] =
@@ -280,6 +282,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuSSE4_1),
   BITFIELD (CpuSSE4_2),
   BITFIELD (CpuAVX),
+  BITFIELD (CpuL1OM),
   BITFIELD (CpuSSE4a),
   BITFIELD (Cpu3dnow),
   BITFIELD (Cpu3dnowA),
@@ -514,14 +517,15 @@ next_field (char *str, char sep, char **next, char *last)
 }
 
 static void
-set_bitfield (const char *f, bitfield *array, unsigned int size, int lineno)
+set_bitfield (const char *f, bitfield *array, int value,
+	      unsigned int size, int lineno)
 {
   unsigned int i;
 
   if (strcmp (f, "CpuFP") == 0)
     {
-      set_bitfield("Cpu387", array, size, lineno);
-      set_bitfield("Cpu287", array, size, lineno);
+      set_bitfield("Cpu387", array, value, size, lineno);
+      set_bitfield("Cpu287", array, value, size, lineno);
       f = "Cpu8087";
     }
   else if (strcmp (f, "Mmword") == 0)
@@ -532,7 +536,7 @@ set_bitfield (const char *f, bitfield *array, unsigned int size, int lineno)
   for (i = 0; i < size; i++)
     if (strcasecmp (array[i].name, f) == 0)
       {
-	array[i].value = 1;
+	array[i].value = value;
 	return;
       }
 
@@ -572,6 +576,7 @@ process_i386_cpu_flag (FILE *table, char *flag, int macro,
 		       int lineno)
 {
   char *str, *next, *last;
+  unsigned int i;
   bitfield flags [ARRAY_SIZE (cpu_flags)];
 
   /* Copy the default cpu flags.  */
@@ -579,22 +584,50 @@ process_i386_cpu_flag (FILE *table, char *flag, int macro,
 
   if (strcasecmp (flag, "unknown") == 0)
     {
-      unsigned int i;
-
       /* We turn on everything except for cpu64 in case of
-	 CPU_UNKNOWN_FLAGS. */
+	 CPU_UNKNOWN_FLAGS.  */
+      for (i = 0; i < ARRAY_SIZE (flags); i++)
+	if (flags[i].position != Cpu64)
+	  flags[i].value = 1;
+    }
+  else if (flag[0] == '~')
+    {
+      last = flag + strlen (flag);
+
+      if (flag[1] == '(')
+	{
+	  last -= 1;
+	  next = flag + 2;
+	  if (*last != ')')
+	    fail (_("%s: %d: Missing `)' in bitfield: %s\n"), filename,
+		  lineno, flag);
+	  *last = '\0';
+	}
+      else
+	next = flag + 1;
+
+      /* First we turn on everything except for cpu64.  */
       for (i = 0; i < ARRAY_SIZE (flags); i++)
 	if (flags[i].position != Cpu64)
 	  flags[i].value = 1;
+
+      /* Turn off selective bits.  */
+      for (; next && next < last; )
+	{
+	  str = next_field (next, '|', &next, last);
+	  if (str)
+	    set_bitfield (str, flags, 0, ARRAY_SIZE (flags), lineno);
+	}
     }
   else if (strcmp (flag, "0"))
     {
+      /* Turn on selective bits.  */
       last = flag + strlen (flag);
       for (next = flag; next && next < last; )
 	{
 	  str = next_field (next, '|', &next, last);
 	  if (str)
-	    set_bitfield (str, flags, ARRAY_SIZE (flags), lineno);
+	    set_bitfield (str, flags, 1, ARRAY_SIZE (flags), lineno);
 	}
     }
 
@@ -635,7 +668,8 @@ process_i386_opcode_modifier (FILE *table, char *mod, int lineno)
 	{
 	  str = next_field (next, '|', &next, last);
 	  if (str)
-	    set_bitfield (str, modifiers, ARRAY_SIZE (modifiers), lineno);
+	    set_bitfield (str, modifiers, 1, ARRAY_SIZE (modifiers),
+			  lineno);
 	}
     }
   output_opcode_modifier (table, modifiers, ARRAY_SIZE (modifiers));
@@ -682,7 +716,7 @@ process_i386_operand_type (FILE *table, char *op, int macro,
 	{
 	  str = next_field (next, '|', &next, last);
 	  if (str)
-	    set_bitfield (str, types, ARRAY_SIZE (types), lineno);
+	    set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
 	}
     }
   output_operand_type (table, types, ARRAY_SIZE (types), macro,