| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add system register and embedded debug register support. |   Kuan-Lin Chen | 2013-12-18 | 1 | -0/+6 |
| * | Properly handle ljmp/lcall with invalid MODRM byte |   Michael Zolotukhin | 2013-12-17 | 1 | -0/+7 |
| * | Add support to show the symbolic names of the MIPS CP1 registers. |   Andrew Bennett | 2013-12-16 | 1 | -0/+14 |
| * | Range of element index is too large on MIPS MSA element selection instructions. | Andrew Bennett | 2013-12-16 | 1 | -0/+11 |
| * | 2013-12-13 Jan-Benedict Glaw <jbglaw@lug-owl.de> |   Jan-Benedict Glaw | 2013-12-13 | 1 | -0/+4 |
| * | Add support for Andes NDS32: | Kuan-Lin Chen | 2013-12-13 | 1 | -0/+14 |
| * | * s390-mkopc.c (dumpTable): Provide a format string to printf so |   Nick Clifton | 2013-12-05 | 1 | -0/+6 |
| * | gas/testsuite/ |   Yufeng Zhang | 2013-11-20 | 1 | -0/+4 |
| * | 2013-11-19 Catherine Moore <clm@codesourcery.com> |   Catherine Moore | 2013-11-19 | 1 | -0/+6 |
| * | Revert "Add support for AArch64 trace unit registers." | Yufeng Zhang | 2013-11-18 | 1 | -0/+12 |
| * | gas/ | Yufeng Zhang | 2013-11-15 | 1 | -0/+8 |
| * | MIPS/opcodes: Add MFCR and MTCR data dependencies |   Maciej W. Rozycki | 2013-11-15 | 1 | -0/+5 |
| * | Fix ChangeLog entries from earlier commit. | Catherine Moore | 2013-11-11 | 1 | -0/+11 |
| * | Remove CpuNop from CPU_K6_2_FLAGS |   H.J. Lu | 2013-11-08 | 1 | -0/+6 |
| * | gas/ | Yufeng Zhang | 2013-11-05 | 1 | -0/+8 |
| * | gas/ | Yufeng Zhang | 2013-11-05 | 1 | -0/+14 |
| * | opcodes/ | Yufeng Zhang | 2013-11-05 | 1 | -0/+6 |
| * | S/390: Disassemble 31-bit binaries with "zarch" opcode set by default |   Andreas Arnez | 2013-10-30 | 1 | -0/+5 |
| * | Fix neon vshll disassembly. |   Ramana Radhakrishnan | 2013-10-15 | 1 | -0/+4 |
| * | 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |   Chao-ying Fu | 2013-10-14 | 1 | -0/+22 |
| * | 2013-10-13 Sandra Loosemore <sandra@codesourcery.com> |   Sandra Loosemore | 2013-10-14 | 1 | -0/+5 |
| * | Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcn | H.J. Lu | 2013-10-12 | 1 | -0/+10 |
| * | * Removed short_hand field from opcode table and |   Sean Keys | 2013-10-11 | 1 | -0/+6 |
| * | opcodes/ |   Roland McGrath | 2013-10-11 | 1 | -0/+5 |
| * | opcodes/ | Roland McGrath | 2013-10-10 | 1 | -0/+5 |
| * | opcodes/ | Roland McGrath | 2013-10-10 | 1 | -0/+5 |
| * | opcodes/ |   Jan Beulich | 2013-10-08 | 1 | -0/+7 |
| * | 2013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com> | Chao-ying Fu | 2013-10-07 | 1 | -0/+4 |
| * | Add Size64 to movq/vmovq with Reg64 operand | H.J. Lu | 2013-09-30 | 1 | -0/+5 |
| * | Add AMD bdver4 support. |   Saravanan Ekanathan | 2013-09-30 | 1 | -0/+5 |
| * | * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonical |   Alan Modra | 2013-09-20 | 1 | -0/+4 |
| * | opcodes/ |   Richard Sandiford | 2013-09-17 | 1 | -0/+4 |
| * | PR gas/15914 | Nick Clifton | 2013-09-04 | 1 | -0/+8 |
| * | 2013-09-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |   Andreas Krebbel | 2013-09-02 | 1 | -0/+6 |
| * | * aarch64-opc.c (aarch64_logical_immediate_p): Return FALSE if the | Nick Clifton | 2013-08-28 | 1 | -0/+5 |
| * | opcodes/ |   Maciej W. Rozycki | 2013-08-23 | 1 | -0/+5 |
| * | PR binutils/15834 | Nick Clifton | 2013-08-23 | 1 | -0/+7 |
| * | include/opcode/ | Richard Sandiford | 2013-08-19 | 1 | -0/+7 |
| * | include/opcode/ | Richard Sandiford | 2013-08-19 | 1 | -0/+9 |
| * | Remove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3F | H.J. Lu | 2013-08-19 | 1 | -0/+6 |
| * | opcodes/ | Richard Sandiford | 2013-08-06 | 1 | -0/+5 |
| * | gas/ |   Eric Botcazou | 2013-08-05 | 1 | -0/+16 |
| * | include/opcode/ | Richard Sandiford | 2013-08-04 | 1 | -0/+16 |
| * | include/opcode/ | Richard Sandiford | 2013-08-03 | 1 | -0/+7 |
| * | opcodes/ | Richard Sandiford | 2013-08-01 | 1 | -0/+4 |
| * | include/opcode/ | Richard Sandiford | 2013-08-01 | 1 | -0/+30 |
| * | include/opcode/ | Richard Sandiford | 2013-08-01 | 1 | -0/+8 |
| * | opcodes/ | Richard Sandiford | 2013-08-01 | 1 | -0/+4 |
| * | opcodes/ | Richard Sandiford | 2013-08-01 | 1 | -0/+6 |
| * | opcodes/ | Richard Sandiford | 2013-08-01 | 1 | -0/+7 |
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