diff options
| author |   Michał Górny <mgorny@gentoo.org> | 2019-08-12 14:32:08 +0200 |
|---|---|---|
| committer | Michał Górny <mgorny@gentoo.org> | 2019-08-12 15:20:47 +0200 |
| commit | 54fde3444f274bf683002783835a1a98be8904d0 (patch) | |
| tree | 6d9d4b66a0fded062c505dbea4be835485d3bbe8 /sys-devel | |
| parent | dev-ml/llvm-ocaml: RISCV is no longer exp. in 9.0+ (diff) | |
| download | gentoo-54fde3444f274bf683002783835a1a98be8904d0.tar.gz gentoo-54fde3444f274bf683002783835a1a98be8904d0.tar.bz2 gentoo-54fde3444f274bf683002783835a1a98be8904d0.zip | |
sys-devel/clang: RISCV is no longer exp. in 9.0+
Closes: https://bugs.gentoo.org/691816
Signed-off-by: Michał Górny <mgorny@gentoo.org>
Diffstat (limited to 'sys-devel')
| -rw-r--r-- | sys-devel/clang/clang-10.0.0.9999.ebuild | 4 | ||||
| -rw-r--r-- | sys-devel/clang/clang-9.0.0.9999.ebuild | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/sys-devel/clang/clang-10.0.0.9999.ebuild b/sys-devel/clang/clang-10.0.0.9999.ebuild index cd46cc44021a..8c2f969f179f 100644 --- a/sys-devel/clang/clang-10.0.0.9999.ebuild +++ b/sys-devel/clang/clang-10.0.0.9999.ebuild @@ -18,9 +18,9 @@ EGIT_REPO_URI="https://git.llvm.org/git/clang.git https://github.com/llvm-mirror/clang.git" # Keep in sync with sys-devel/llvm -ALL_LLVM_EXPERIMENTAL_TARGETS=( AVR Nios2 RISCV ) +ALL_LLVM_EXPERIMENTAL_TARGETS=( AVR Nios2 ) ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 - NVPTX PowerPC Sparc SystemZ WebAssembly X86 XCore + NVPTX PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore "${ALL_LLVM_EXPERIMENTAL_TARGETS[@]}" ) ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" ) LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?} diff --git a/sys-devel/clang/clang-9.0.0.9999.ebuild b/sys-devel/clang/clang-9.0.0.9999.ebuild index 080cdf670377..2a3b7d07905f 100644 --- a/sys-devel/clang/clang-9.0.0.9999.ebuild +++ b/sys-devel/clang/clang-9.0.0.9999.ebuild @@ -20,7 +20,7 @@ EGIT_BRANCH="release_90" # Keep in sync with sys-devel/llvm ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 - NVPTX PowerPC Sparc SystemZ WebAssembly X86 XCore ) + NVPTX PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore ) ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" ) LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?} |